Instructors

Prof. Dr. Tilmann Rabl, Marcel Weisgut

Description

In this project seminar, we will discuss data processing techniques on modern hardware. Specifically, we will look at the characteristics of modern processors (FPGA), fast storage (NVMe SSDs), and memory management on many-core systems (NUMA). We will research, how data processing can be done most efficiently on this kind of hardware. To this end, we will survey current trends, read and present research papers, identify a small research project, and implement and evaluate a prototype for data processing on modern hardware.

Structure

Project

This course will be structured around group research projects of the students' choice in the field of FPGAs, NVMe SSDs, NUMA architectures, and related technologies. Depending on their interests, students will work in groups of two and come up with their own project ideas. The students should implement their ideas and evalute them. At the end of the course, the students should hand in a written report on their project. Ideally, we aim to publish the results at relevant conferences in this field.

Paper Discussions

To develop a solid understanding of current state-of-the-art around FPGAs, NVMe SSDs, NUMA architectures, we want to discuss current research papers on a regular basis (i.e., weekly or bi-weekly). Each student should prepare such a discussion session and lead it. This involves studying the paper in detail, briefly presenting it, preparing potential discussion topics, and moderating the following discussion. 

Grading

• Project + report: 50%
• Paper discussions: 20%
• Final presentation: 20%
• Active participation + one pagers: 10%

One pager: a brief summary and questions about a paper to be read

Announcements

• The course will be managed via HPI Moodle. This is where we will announce things and share materials. 
• The course is limited to a maximum of 6 students.
• Kick-off Meeting, Wednesday, 18th October 09:15 in F-1.11
• Due to space limitations, please send me an email (marcel.weisgut(at)hpi.de) if you want to participate in this course by Friday, 20th October 23:59. You do not need to send us this mail before the first event, so you can come and decide if you want to take this course after the intro. There is no first come, first served.

Prerequisites

Successful completion of the course Hardware-conscious Data Processing (in 2022 or 2023)

Basic Requirements

• Good programming skills (ideally C/C++)
• Interest in modern hardware
• Interest and previous knowledge in database systems (e.g., DBS II, BDS, DYOD)

Schedule

The course will take place Wednesdays at 09:15. The meetings will be weekly (most weeks) to discuss a new paper and the individual teams' progress.